8.21.4 Clock output

　　The LPC81xM features a clock output function that routes the IRC, the SysOsc, the

　　watchdog oscillator, or the main clock to the CLKOUT function. The CLKOUT function can

　　be connected to any digital pin through the switch matrix.

　　8.21.5 Wake-up process

　　The LPC81xM begin operation at power-up by using the IRC as the clock source. This

　　allows chip operation to resume quickly. If the SysOsc, the external clock source, or the

　　PLL is needed by the application, software must enable these features and wait for them

　　to stabilize before they are used as a clock source.

　　8.21.6 Power control

　　The LPC81xM supports the ARM Cortex-M0 Sleep mode. The CPU clock rate may also

　　be controlled as needed by changing clock sources, reconfiguring PLL values, and/or

　　altering the CPU clock divider value. This allows a trade-off of power versus processing

　　speed based on application requirements. In addition, a register is provided for shutting

　　down the clocks to individual on-chip peripherals, allowing to fine-tune power

　　consumption by eliminating all dynamic power use in any peripherals that are not required

　　for the application. Selected peripherals have their own clock divider which provides even

　　better power control.