INFINEON存储器系列 S80KS5123GABHV023

　　Features

　　Interface

　　- xSPI (octal) Interface

　　- 1.8 V Interface support

　　Single ended clock (CK) - 11 bus signals

　　Optional Differential clock (CK, CK#) - 12 bus signals

　　- Chip Select (CS#)

　　- 8-bit data bus (DQ[7:0])

　　- Hardware reset (RESET#)

　　- Bidirectional read-write data strobe (RWDS)

　　Output at the start of all transactions to indicate refresh latency

　　Output during read transactions as read data strobe

　　Input during write transactions as write data mask

　　Performance, power, and packages

　　- 200-MHz maximum clock rate

　　- DDR - transfers data on both edges of the clock

　　- Data throughput up to 400 MBps (3,200 Mbps)

　　- Configurable burst characteristics

　　Linear burst

　　Wrapped burst lengths:

　　16 bytes (8 clocks)

　　32 bytes (16 clocks)

　　64 bytes (32 clocks)

　　128 bytes (64 clocks)

　　Hybrid option - one wrapped burst followed by linear burst on 256 Mb. Linear Burst across die boundary is

　　not supported.

　　- Configurable output drive strength

　　- Power modes

　　Hybrid sleep mode

　　Deep power down

　　- Arrays refresh

　　Partial memory array (1/8, 1/4, 1/2, and so on)

　　Full

　　- Package

　　24-ball FBGA

　　- Operating Temperature Range

　　Industrial (I): –40 °C to +85 °C

　　Industrial Plus (V): –40 °C to +105 °C

　　Automotive, AEC-Q100 Grade 3: –40 °C to +85 °C

　　Automotive, AEC-Q100 Grade 2: –40 °C to +105°C

　　Automotive, AEC-Q100 Grade 1: –40 °C to +125 °C

　　Technology

　　- 25-nm DRAM