CY7C64713-56LTXC 英飞凌USB微控制器芯片

　　Features

　　■ Single chip integrated USB transceiver, SIE, and enhanced 8051 microprocessor

　　■ Fit, form, and function upgradable to the FX2LP (CY7C68013A)

　　Pin compatible

　　Object code compatible

　　Functionally compatible (FX1 functionality is a subset of the FX2LP)

　　■ Draws no more than 65 mA in any mode, making the FX1 suitable for bus powered applications

　　■ Software: 8051 runs from internal RAM, which is:

　　Downloaded using USB

　　Loaded from EEPROM

　　External memory device (128 pin configuration only)

　　■ 16 KB of on-chip code/data RAM

　　■ Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints

　　Buffering options: double, triple, and quad

　　■ Additional programmable (BULK/INTERRUPT) 64-byte endpoint

　　■ 8- or 16-bit external data interface

　　■ Smart media standard ECC generation

　　■ GPIF

　　Allows direct connection to most parallel interfaces; 8- and 16-bit

　　Programmable waveform descriptors and configuration registers to define waveforms

　　Supports multiple ready (RDY) inputs and Control (CTL) outputs

　　■ Integrated, industry standard 8051 with enhanced features:

　　Up to 48 MHz clock rate

　　Four clocks for each instruction cycle

　　Two USARTS

　　Three counters or timers

　　Expanded interrupt system

　　Two data pointers

　　■ 3.3 V operation with 5 V tolerant inputs

　　■ Smart SIE

　　■ Vectored USB interrupts

　　■ Separate data buffers for the setup and DATA portions of a CONTROL transfer

　　■ Integrated I2C controller, running at 100 or 400 KHz

　　■ 48 MHz, 24 MHz, or 12 MHz 8051 operation

　　■ Four integrated FIFOs

　　Brings glue and FIFOs inside for lower system cost

　　Automatic conversion to and from 16-bit buses

　　Master or slave operation

　　FIFOs can use externally supplied clock or asynchronous strobes

　　Easy interface to ASIC and DSP ICs

　　■ Vectored for FIFO and GPIF Interrupts

　　■ Up to 40 general purpose IOs (GPIO)